1. Field of the Invention
The present invention relates to user-programmable circuit technology. More particularly, the present invention relates to antifuse technology and to methods for simultaneously programming a plurality of antifuses in a user-programmable circuit containing an array of antifuses.
2. The Prior Art
Antifuse structures, user-programmable integrated circuit architectures, and circuits and methods for programming antifuses in a user-programmable integrated circuit are known in the prior art. U.S. Pat. Nos. 4,823,181, 4,758,745, and 5,070,384 disclose illustrative antifuse structures, programming circuits and circuit architectures employing antifuses. U.S. Pat. Nos. 5,126,282 and 5,130,777 disclose illustrative methods for programming antifuses in userprogrammable integrated circuit structures.
Basically, an antifuse may be programmed by placing a programming potential, usually referred to as V.sub.pp, across it to disrupt the antifuse material disposed between its two conductive electrodes and to thereby form a conductive low-resistance path between the two electrodes. Typical antifuse programming may be viewed as comprising two cycles. During a first portion of a programming cycle, often referred to as a "rupture" cycle, the antifuse material is initially disrupted to form a conductive path. After the antifuse material has been ruptured, a second portion of a programming cycle, often referred to as a "soak" cycle, current is allowed to flow through the ruptured antifuse material to lower the final resistance of the programmed antifuse. After the antifuse ruptures, current flows until both sides of the antifuse are at equal potential. This current can be very large since its amplitude is only limited by the small parasitic resistance of the circuit layout and the intrinsic antifuse resistance.
A high current causes a large amount of instantaneous power to be dissipated by the antifuse structure. Therefore, the energy available for an instantaneous discharge must be limited to a level low enough to prevent antifuse contacts and vias from being damaged, or circuit structures associated with the programming path from being melted. The amount of "instantaneous" energy that can be delivered by this current spike is limited by the effective capacitance in the discharge loop.
In some interconnect architectures employing antifuses, large numbers of "cross antifuses", i.e., antifuses disposed at the intersections of conductors running in horizontal and vertical directions, are connected to a single conductor. The capacitance of such a circuit structure increases as the number of cross antifuses connected to the single conductor.
In an antifuse-based architecture, such as an FPGA architecture, single conductors carrying one of the power supply rail voltages to which unused circuit inputs are to be terminated are commonly employed. These conductors are a worst-case example of a large capacitance resulting from many antifuses commonly connected to a single conductor. In an average FPGA array employing antifuses as the programming mechanism to interconnect logic module circuits together, over half of all inputs to the logic modules are tied off to a conductor carrying one of the power supply rail potentials.
If each logic module input has a characteristic capacitance of about 1 pF, then these conductors can have hundreds of picofarads of capacitance associated with them because of the hundreds of inputs which must be tied off in even the smallest FPGA arrays. As the size of integrated circuits containing these features increases, so does this capacitance. Depending on the programming scheme used to program the antifuses, the capacitance of these conductors will eventually be able to store enough energy to damage or destroy the antifuse structures.
According to widely used prior art antifuse programming methods, the rupture and soak cycles are combined. First the antifuse material is ruptured, and then the antifuse is stressed by maintaining DC or AC connections to the programming voltage power supply to allow soak current to begin flowing into the antifuse immediately after rupture. Due to the voltage drops on the programming devices, and the current limiting circuitry in the external electronics, this soak current eventually lowers the voltage on the large conductor. If an attempt is made to simultaneously program several antifuses on the same conductor, the current flowing through the first antifuse to rupture would lower the programming voltage for the remaining antifuses. A one-volt reduction in programming voltage can increase the programming time from three to ten times its intended duration. This problem is magnified when the second antifuse ruptures and begins to draw current.
Some existing antifuse architectures employ programming voltage transistors in such a way that when the antifuse ruptures, charge is redistributed between the unprogrammed antifuse capacitors located at intersecting conductors. Smaller capacitors experience larger voltage changes than do larger capacitances, so during rupture the interconnect conductors containing fewer antifuses can shift many volts while the interconnect conductors containing larger numbers of antifuses may hardly move ( i.e., much less than one volt). The programming devices usually have a V.sub.Bll value of about 10v. In some architectures, the V.sub.ds of the programming devices can exceed V.sub.Bll because the capacitance of the interconnect conductor is too small to prevent the voltage from instantaneously raising above V.sub.Bll. Programming of antifuse architectures is thus capable of inadvertent destruction of programming transistors, as well as antifuses.